In recent years, resin multilayer circuit boards have been applied to packages including a circuit board or a semiconductor element. A resin multilayer circuit board includes a plurality of resin layers, each of which includes a conductive wiring layer on a surface of a resin sheet containing a resin. With increasing number of wiring layers, different conductive wiring layers are sometimes electrically connected to each other through a via-hole conductor. In general, such a via-hole conductor is formed by boring a via-hole (through-hole) in a resin sheet at a predetermined position and plating the inner wall of the via-hole.
However, such a method disadvantageously requires an expensive chemical in chemical plating and a long treatment time. Furthermore, it is difficult to form a via-hole conductor between intended layers in the manufacture of a multilayer circuit board. Thus, the density of the conductive wiring layers cannot be sufficiently increased.
In view of the situations described above, according to a recent method, a low-viscosity electroconductive paste containing a metal powder and an organic component filled in a via-hole is solidified to form a via-hole conductor. A known electroconductive paste for use in the formation of a via-hole conductor may be an electroconductive paste containing a metal component (lead-free solder) mainly composed of Cu or Ag, Sn, and Bi and an organic component (flux component) or a contact-type electroconductive paste containing Ag or Cu and an organic component.
For example, Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2002-290052) discloses a method for filling a via-hole with an electroconductive paste by screen printing to form a via-hole conductor for a multilayer circuit board. The electroconductive paste contains an electroconductive metal component containing Cu, Sn, and Bi in a predetermined ratio and an organic component.
However, because of a low diffusion velocity of Sn in a reaction between Ag or Cu and Sn, complete alloying of Sn takes a long time. Thus, a short heat treatment results in the presence of unreacted Sn (low-melting-point metal) in a via-hole conductor and consequently low heat resistance of the via-hole conductor.
A known method for manufacturing a semiconductor device for die-bonding a chip or a semiconductor device for flip chip bonding is a temperature hierarchy connection method in which connection using a high-melting-point solder in a semiconductor device is followed by the connection of the semiconductor device to a substrate with a low melting point solder. The semiconductor device is soldered at a lower temperature than the melting point of the solder within the semiconductor device. Thus, the semiconductor device can be connected to the substrate without melting the solder within the semiconductor device.
As a high-melting-point solder for use in such a temperature hierarchy connection method, Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2002-254194) discloses a solder paste that contains a low-melting-point metal Sn or In ball and a high-melting-point metal Cu, Al, Au, or Ag ball. As illustrated in FIG. 4(a), the solder paste disclosed in Patent Document 2 contains low-melting-point metal balls 91, high-melting-point metal balls 92, and a flux component. During heat treatment, a low-melting-point metal of the low-melting-point metal balls reacts with a high-melting-point metal of the high-melting-point metal balls to form a high-melting-point intermetallic compound. After heat treatment, as illustrated in FIG. 4(b), a plurality of high-melting-point metal balls 92 are linked together through the intermetallic compound 93. This heat-resistant linkage allows conductive wiring layers to be connected to each other.
However, in a reaction between a high-melting-point metal, such as Cu, and a low-melting-point metal, such as Sn, complete alloying of the low-melting-point metal takes a long time because of a low diffusion velocity of the low-melting-point metal. Thus, a short heat treatment results in the presence of a residual low-melting-point metal, such as Sn. In the formation of a via-hole conductor using such a known electroconductive paste (solder paste), therefore, the via-hole conductor has insufficient heat resistance because of residual Sn.
Even with such a known electroconductive paste, a long heat treatment at a high temperature can completely eliminate Sn from the via-hole conductor. However, such a heat treatment may cause the resin of the resin sheet to flow out and result in low productivity. Thus, such a heat treatment is undesirable from a practical standpoint.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2002-290052
Patent Document 2: Japanese Unexamined Patent Application Publication No. 2002-254194